Silicon Learning
 |
Tessent Diagnosis
Tessent® Diagnosis makes failing test cycles valuable. With layout-aware and cell-aware diagnosis technologies, the product accurately identifies the location and classification of defects causing Tessent TestKompress® or Tessent FastScan™ pattern to fail manufacturing test. |
|
Tessent YieldInsight
Tessent YieldInsight is specialized for understanding and identifying yield loss from scan test data and makes volume diagnosis results actionable. Using specialized data mining and statistical analysis techniques, the product eliminates noise from diagnosis data to determine the underlying root causes, identify systematic yield limiters, and select the best devices for failure analysis. This dramatically accelerates the time to root cause of yield loss. |
 |
|
 |
Tessent SiliconInsight
Tessent® SiliconInsight® in Tessent Shell provides an automated interactive environment for test bring-up, debug, and silicon characterization of devices containing Tessent ATPG, EDT, BIST, and/or IJTAG test structures. Tessent SiliconInsight greatly increases productivity for chip designers and test engineers during silicon validation and debug, speeding time-to-market. The solution works in a bench-top environment and connects to any debug, performance, or bring-up board, accessing up to 120 device pins. |
|
